Technical Field
The present invention is generally related to the fabrication of three-dimensional semiconductor devices. More particularly, the present invention relates to introducing a punch-through-stop after a partial fin etch.
Background Information
In the fabrication of three-dimensional semiconductor devices, much effort has gone into reducing current leakage due to short-channel effects. Various attempts to do so have achieved varying degrees of success. For example, punch-through-stop (PTS) implants have been utilized at different stages of fabrication, each stage having unwanted trade-offs. For example, PTS implants after fin patterning have reduced dopant diffusion, giving better short channel control, but also introduced implant damage to the fin leading to mobility degradation. The opposite is true of implanting the PTS before fin patterning.
Thus, a need continues to exist for an effective way to combat short-channel effects while reducing or eliminating the unwanted trade-offs.